EPC claims its seventh-generation, 40-V power transistor delivers up to 3X better performance than equivalent silicon MOSFETs ...
Why security is important to the chiplet supply chain. Synopsys' 3DIC Compiler platform, enhanced by AI optimizations, handles multi-die and advanced chiplet packaging co-design and optimization for 2 ...
Andy’s back from the 2026 Analog Aficionados meetup, held at DesignCon this year, and pieces together some history of the event as well as launching a downloadable annual ...
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The independent technology information source for electronics engineers, programmers and developers.
Three of Electronic Design’s most colorful editors will be attending North America’s leading power conference and would love ...
The independent technology information source for electronics engineers, programmers and developers.
How VisualSim Architect models complex multi-die and chiplet-based systems before implementation. Why UCIe latency analysis is important when integrating chiplets from different vendors. How comparing ...
In celebration of International Women's Day, I did a special drawing to capture the event.
Infineon gives vertical power delivery a push with a new generation of multiphase power modules that can be tucked underneath ...
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UCIe 3.0 springs open the door to higher speeds, enhanced link reliability, and smarter system coordination for increasingly complex chiplet packaging needs.
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