Munich, Germany - 29 November 2022 - At RISC-V Summit 2022, Codasip, the leader in processor design automation and RISC-V processor IP, will present solutions for implementing safety and security in ...

RISC-V Summit 2019 held December 10 – 12. SiFive founders, leaders, and RISC-V inventors will present on various topics over the multi-day event held at the San Jose Convention Center in San Jose, ...

Many add-ons already are approved extensions, and a large number were unveiled at the RISC-V Summit in December 2021. But questions remain. Is the base specification small enough? Instead of adding ...

the company revealed at the RISC-V Summit this month (via NickBrownHPC). Modern GPUs are highly complex system-on-chips with ...

There is one completely open-source and free architecture though, known as RISC-V, and its design and philosophy allow anyone to build and experiment with it, like this build which implements a ...

Imagination Technologies has decided to exit the RISC-V CPU market to redirect its resources to the development of its GPU ...

The new “C3” variant has a single 160 MHz RISC-V core that out-performs the ESP8266, and at the same time includes most of the peripheral set of an ESP32. While RAM often ends up scarce on an ...