Target is 3D stacking and interposer for next-generation AI applications.

Qualcomm and Google have partnered to develop a RISC-V wearable solution for use with smart watches based on the Wear OS by Google. The companies announced an expansion of their partnership to develop ...

The Hong Kong and China Gas Company Limited (“Towngas”), together with a number of industry-leading enterprises and institutions, announced the official launch of the Hong Kong RISC-V Alliance (HKRVA) ...

CEA-Leti and CEA-List have entered into a strategic partnership with Powerchip Semiconductor Manufacturing Corporation (PSMC) ...

Samsung is preparing a PCIe 5.0 SSD that pairs quad-level cell (QLC) flash memory with a RISC-V-based controller, a ...

The two companies, both long-time partners of Arm, are extending their collaboration on wearables with a RISC-V Snapdragon Wearable platform to power the next-generation Wear OS solutions. “What about ...

Arteris and Semidynamics partnership enhances the flexibility and highly configurable interoperability of RISC-V processor IP with system IP. Integrated and optimized solutions will focus on ...

Have you ever wondered if there’s a way to break free from the dominance of proprietary computing architectures like x86 and ARM? For decades, these platforms have dictated the rules of the game, ...

ARM is the most successful microprocessor architecture on the planet, with its licensees shipping billions of chips a year. But a rival has emerged in the past few years called RISC-V, a new kind of ...

Forbes contributors publish independent expert analyses and insights. Marco Chiappetta is a technologist who covers semiconductors and AI. In recent years, the RISC-V architecture has gained ...

The summit has concluded, but you can watch the keynotes and sessions now. A look behind OpenTitan, the world’s first commercial-grade open-source chip, and how it could change the landscape of ...